The Hardware Security Engineer owns the security posture of embedded hardware and firmware products, from threat modeling during design to hands-on device assessment and defining secure architecture patterns. This includes defining and evolving cybersecurity processes in the product development life cycle.

Responsibilities

Perform hands-on security testing of our devices: JTAG/UART/SWD exploitation, firmware extraction, fault injection, side-channel analysis
Identify and document attack surfaces across RF interfaces, debug ports, physical access vectors, supply chain, etc.
Conduct threat modeling (STRIDE or equivalent) at the start of each product cycle
Produce risk-rated findings with clear, actionable remediation steps
Define hardware security architecture for new products (and threat assessments for existing products): secure boot, hardware root of trust, encrypted storage, key management
Evaluate and select security ICs — secure elements (ATECC608, SE050), TPMs, HSMs and more
Work with design teams, giving guidance and recommendations
Assess wireless interfaces against jamming, spoofing, replay, and protocol-level attacks
Define encryption, authentication, and anti-replay requirements for datalink and SDR-based systems
Integrate security checkpoints into EVT, DVT, and PVT gates
Conduct security-focused code and design reviews
Train RnD engineers on hardware security fundamentals

Requirements

5+ years in hardware security, embedded security, or product security engineering
Hands-on experience with JTAG/UART/SWD exploitation, fault injection, and side-channel analysis
Firmware extraction and reverse engineering (Ghidra, IDA Pro, Binwalk, or equivalent)
Practical knowledge of AES, ECC, secure key storage, TLS/DTLS applied to resource-constrained embedded systems

Nice to have

SDR-based attacks, signal analysis, protocol reverse engineering
Experience assessing datalink or UAV communication systems
Hands-on integration of secure elements: ATECC608, SE050, or equivalent TPM/HSM
Familiarity with IEC 62443, NIST SP 800-193, PSA Certified, or FIPS 140-2/3

Benefits

Paid Time Off: the Employee is entitled to an annual holiday 4 + 1 weeks
Lunch Benefit: daily lunch allowance up to the tax‑free limit as a fringe benefit.
Sport & Culture: annual budget for gyms, sports activities, cultural events, and hobbies.
Wellbeing Allowance: additional allowance for massage, mental health services, and other wellness support.
Extended Occupational Healthcare: enhanced coverage including GP, specialists, mental health, and partial dental care.
Accident Insurance (24/7): full coverage for accidents during both work and free time.
Business Travel Insurance: coverage for work‑related travel.
Snacks & Office Comforts: coffee, snacks, fruits, and other office perks.
Flexible Working Hours: core hours from 10:00 to 15:00.
No‑Crunch Policy: no systematic overtime; overtime is compensated or reimbursed.
Meeting‑Light Culture: protected focus time and minimal unnecessary meetings.
High‑End Equipment: premium laptop, monitor, and peripherals.
Lab & Gadget Budget: annual budget for hardware, tools, books, and learning materials.
Hackathons & Offsites: regular internal events focused on innovation and technology.
Business Travel Expenses: full coverage of tickets, accommodation, and transportation.
Per Diem (Vero Max): daily allowances according to the maximum tax‑free Vero rates.
Low‑hierarchy, engineering‑driven environment with strong autonomy and zero micromanagement.