FPGA Verification Engineer, Air Dominance and Strike

We are looking for an FPGA Verification Engineer to join our rapidly growing team in Costa Mesa, CA. You will own verification of FPGA/SoC designs on AMD (Xilinx) platforms for flight-critical avionics, with a focus on UVM-based methodology and coverage-driven verification. This will require expertise in SystemVerilog, object-oriented programming, and UVM. If you are someone who has supported rapid avionics development, then this role is for you.

Responsibilities

• Architect and implement UVM verification environments (drivers, monitors, predictors, scoreboards) for AMD (Xilinx) FPGA/SoC designs
• Develop verification plans with traceability to system and hardware requirements
• Author SystemVerilog Assertions (SVA) for protocol compliance and design intent checks
• Build functional coverage models and drive code coverage analysis to closure
• Develop constrained-random and transaction-level test sequences to maximize coverage and uncover corner-case bugs
• Establish and maintain regression suites, tracking coverage metrics and verification progress
• Debug failures using waveform tools and simulation logs at the HDL and system level
• Collaborate with design engineers on RTL reviews, bug resolution, and micro-architecture refinement
• Support hardware validation and board bring-up on target platforms
• Ensure verification meets DO-254 and relevant safety standards
• Author verification closure reports and coverage analysis summaries

Requirements

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field
• 2+ years of experience in FPGA/ASIC verification
• Proficient in SystemVerilog, UVM methodology and SVA, with experience contributing to and extending UVM testbenches
• Object-oriented programming principles
• Industry simulators (Questa, VCS, Xcelium, or Vivado)
• Git-based collaborative workflows including code review
• Linux development environments
• Strong communication and teamwork skills
• Eligible to obtain and hold a U.S. Secret security clearance

Nice to have

• 5+ years of experience in FPGA/ASIC verification
• Master’s degree in Electrical Engineering, Computer Engineering, or related field
• DO-254, avionics verification standards for UAS, and safety-critical verification processes
• SVUnit or equivalent unit-testing frameworks
• Formal verification or CDC verification tools
• Digital interfaces: Ethernet, PCIe, JESD204C, MIL-STD-1553, SPI
• Verification automation scripting (Python, Tcl, Makefile)
• SoC and ARM-based embedded platforms
• Verification automation, CI/CD integration, and Nix-based build environments

Benefits

• At Anduril, we invest in our people. Our comprehensive, competitive benefits package (available at little to no cost to employees) ensures you’re supported in health, recovery, and whatever comes next. For more information, Explore Our Benefits.